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PIN CONNECTIONS
Table 2. 35XS3500 Pin Definitions (continued)
Functional descriptions these pins can be found in the Functional Description section beginning on page 20 .
Pin
10
Pin Name
SI
Pin Function
Input
Formal Name
Master-Out Slave-In
Definition
This data input is sampled on the positive edge of the SCLK. This pin has
a passive internal pull-down resistance.
11
12
VCC
SO
Input
Output
Logic Supply
Master-In Slave-Out
SPI Logic power supply.
SPI data sent to the MCU by this p in . This data output changes on the
negative edge of SCLK, and when CS is high. This pin is high-impedance.
13
FETOUT
Output
External FET Gate
This pin controls an external SMART MOSFET by logic level. This output
called OUT6.
If OUT6 is not used in the application, this output pin is set to logic high
when the current sense output becomes valid when CSNS sync SPI bit is
set to logic [1].
14, 17, 23
15
16
GND
VBAT
CP
Ground
Input
Output
Ground
Battery Input
Charge Pump
This pin is the ground for the logic and analog circuitry of the device. (1)
Power supply pin.
This pin is the connection for an external tank capacitor (for internal use
only).
18
19
20
21
22
24
OUT5
OUT4
OUT3
OUT2
OUT1
CSNS
Output
Output
Output
Output
Output
Output
Output 5
Output 4
Output 3
Output 2
Output 1
Current Sense Output
Protected 35 m ? high side power output to the load.
This pin is used to output a current proportional to OUT1:OUT5, FET in
current, and it is used externally to generate a ground-referenced voltage
for the microcontroller to monitor output current. Moreover, this pin can
report a voltage proportional to the temperature on the GND flag.
OUT1:OUT5, FET in current sensing and Temperature feedback choice is
SPI programmable.
Notes
1. The pins 14, 17, and 23 must be shorted on the board.
35XS3500
Analog Integrated Circuit Device Data ?
Freescale Semiconductor
5
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